VHDL / Cadence Systems Architect-TS/SCI/Poly with Security Clearance

---

Job description

All Qualified Resumes Will Be Responded to in 24 Hrs or Less TS/SCI/Poly Clearance required Job Description: Designing instruction sets and commands for a massively parallel high-performance computer system. Designing data flow pathways for moving data within a massively parallel system efficiently and reliably. Optimizing parallel computing architectures for optimal performance on purpose built machines. Designing arithmetic logic units for efficient pipelined processing. Interacting with customers, both internal and external, to convey architecture principles and concepts. Efficient and effective communication of design and architecture to digital designers for implementation, simulation and synthesis. Required Education and Expereirence: Bachelor's degree in Computer Science, Computer Engineering, Electrical Engineering, or other relevant technology field with 20 years of relevant experience (18 years with an MS; 15 years with a PhD). Must be fluent in VHDL. Must be familiar with C and/or Matlab. Previous design experience is required. Preferred Qualifications: Ability to use, configure, and manager a Cadence Design. Previous experience with entire design process, from design point through tape out through test and acceptance. A Master's Degree or a PhD in related field is highly desirable.

<!– job description page –>